Safe Supply Voltage for Dual Voltage Amplifiers

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As we know, all types of transistors have a maximum limit for Vds in MOSFETs and Vce in BJT and IGBTs. This parameter must be carefully considered during design (or when replacing / substituting components).

For example, let's look at the end-stage or power stage of a Class D amplifier built with a push-pull configuration using two IRFP054 MOSFETs, as shown in the image. What is the safe voltage for Vpos and Vneg for a push-pull configuration where the transistors have a maximum Vds of 60 volts?


In practice and during the design phase, we must always incorporate an operational safety margin. Similarly for transistors, a malfunction could cause Vpos or Vneg to spike above its normal value. A safety margin, in this case, means that even if a supply voltage surge occurs, it will never exceed the maximum Vds value of the MOSFET (or Vce for BJT and IGBT). A commonly used safety margin ranges from 20% to 50%. The larger the safety margin, the lower the probability of damage.

In a push-pull construction/topology (whether Class D or Class AB/B), careful attention is needed. Note that if one transistor is in a full ON (saturated) state, its Vds will be around 2 volts. For example, if Q2 is in the full ON position, the potential difference across the Vds of Q1 will be:

        Vds Q1 = (Vpos - Vneg - 2) volt

For example, if and ,

        Vds Q1 = (+60V) - (-60V) -2V = 118 V

Conversely, if Q1 is in a full ON state, where its Vds is 2 volts, then the Vds of Q2 will experience a potential difference of 118 V.

Clearly, this number exceeds the transistor's maximum limit. The transistor will definitely be damaged.

Therefore, it must be remembered that the (absolute) value of Vpos and Vneg must be a maximum of Vdsmax​​/2 before subtracting the safety margin. With a safety margin of K, we get:

        Vsupply = (1 - K) x (Vdsmax / 2)

For the example in the image using the IRFP054, with a 20% safety margin (K), we get:

Vpos​ = (1− 0.2) × (60V / 2) = 0.8 × 30V = +24 volts

And because it is symmetrical, volts. In this situation, if Q2 is in a full ON position with a Vds​ of 2 volts, the Vds​ of Q1 will be volts. It is clear that even in this extreme state, the Vds of Q1 is still well below its maximum limit.

Hopefully, this explanation is helpful, especially for beginners (and also for experienced designers) in selecting transistors and determining safe and optimal supply voltage values.

Keep up the great work, and never give up.

TABIK !


(This post is parallel to the status on the FaceBookGroup The Art of Electronics with the same topic)


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